Chinese YMTC Achieves Mass-production of 232-layer 3D NAND, Beating Kioxia, Micron, Samsung, and SK Hynix
YMTC’s ramp to 232-layer closely follows its unexpected 2020 feat of a production-grade 128-layer 3D NAND, which was groundbreaking enough to win a supply contract with Apple, before losing it in October 2022, due to political reasons (not technological reasons). The Xtacking 3.0 architecture involves back side source connect (BSSC) for the memory cell wafer, which leads to simpler process and lower cost compared to Xtacking 2.0 (up to 128-layers, which had introduced nickel silicide (NiSi) instead of tungsten silicide (WSi) for better device performance and I/O speed for CMOS wafer. The original Xtacking architecture from YMTC, which it debuted back in 2016, with layer counts going up to 64-layer, relied on cost-effective wafer-to-wafer bonding. The YMTC 232-layer 3D NAND flash should find plenty of takers in the consumer electronics industry, spanning smartphones, consumer storage devices, TVs, and other appliances. The high layer-count has a direct impact on density, which can help designers lower costs by using fewer chips, or increase capacity.