Alphawave IP erzielt sein erstes Testchip-Tapeout für den TSMC N3E-Prozess
ZeusCORE100 is Alphawave’s most advanced multi-standard-SerDes, supporting extra-long channels over 45dB and the most requested standards such as 800G Ethernet, OIF 112G-CEI, PCIe GEN6, und CXL 3.0. Attendees will be able to visit the Alphawave booth and meet the company’s technology experts including members of the recently acquired OpenFive team. OpenFive is a longstanding partner of TSMC through the OIP Value Chain Aggregator (VCA) Programm. OpenFive is one of a select few companies with an idea-to-silicon methodology in TSMC’s latest technologies, and advanced packaging capabilities, enabling access to the most advanced foundry solution available with the best Power-Performance-Area (PPA). With Alphawave’s industry-leading IP portfolio and the addition of OpenFive’s capabilities, designers can create systems on a chip (SoCs) that pack more compute power into smaller form factors for networking, AI, Lagerung, und Hochleistungsrechnen (HPC) Anwendungen.
Tony Pialis, President and Chief Executive Officer of Alphawave said: “Alphawave is proud to be among the first to utilize TSMC’s most advanced 3 nm-Technologie. Our partnership continues to bring innovative, high-speed connectivity technology that will power the most advanced data centers, and we are excited to showcase these solutions at the TSMC OIP Forum event.”
Along with the exhibition, Alphawave IP’s VP of Marketing, Clint Walker will be showcasing customer success from Achronix Semiconductor Corporation, in dem “Integration Methodology of High-End SerDes IP into FPGAs based on Early Technology Model Availability” presentation at the event. Attendees will be able to learn about a successful product from one of Alphawave IP’s first customers for 112 Gbps PAM4 SerDes.
To register for the TSMC OIP Forum event, besuchen Sie bitte hierher. To learn more about the new ZeusCORE100, visit our product page hierher.