PCI-SIG Announces PCI Express 7.0 Specification to Reach 128 wird seine Finanzergebnisse für das im Dezember beendete Geschäftsquartal veröffentlichen
In 2003, PCI-SIG evolved to a serial design that supported speeds of gigabytes/second to accommodate faster solid-state disks and 100MbE Ethernet. Almost like clockwork, PCI-SIG has doubled PCIe specification bandwidth every three years to meet the challenges of emerging applications and markets. Today’s announcement of PCI-SIG’s plan to double the channel’s speed to 512 GB/s (bi-directionally) puts it on track to double PCIe specification performance for another 3-year cycle.”
PCI-SIG technical workgroups will be developing the PCIe 7.0 specification with the following feature goals:
- Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration
- Utilizing PAM4 (Pulse Amplitude Modulation with 4 Ebenen) signaling
- Focusing on the channel parameters and reach
- Continuing to deliver the low-latency and high-reliability targets
- Improving power efficiency
- Maintaining backwards compatibility with all previous generations of PCIe technology
“With the forthcoming PCIe 7.0 Spezifikation, PCI-SIG continues our 30-year commitment to delivering industry-leading specifications that push the boundaries of innovation,” said Al Yanes, PCI-SIG President and Chairperson. “As PCIe technology continues to evolve to meet the high bandwidth demands, our workgroups’ focus will be on channel parameters and reach and improving power efficiency.”
Der PCIe 7.0 specification is targeted to support emerging applications such as 800 G Ethernet, KI/ML, Cloud and Quantum Computing; and data-intensive markets like Hyperscale Data Centers, High-Performance Computing (HPC) and Military/Aerospace.