AMD AGESA 1.0.0.5C AM5 permite un control detallado sobre la prioridad CCD Ryzen 7000X3D

ASUS began rolling out Beta UEFI firmware updates for its Socket AM5 motherboards encapsulating AGESA 1.0.0.5 patch-C microcode. This exposes several new options to end-users through the UEFI Setup Program, which gives them greater control over the way the processor prioritizes workload among the two CCDs (CPU complex dies) on 12-core and 16-core Ryzen 7000 procesadores en serie, including the upcoming 7000X3D processors.

While AMD is working to release Chipset Software updates that include “3D V-cache Optimization driver” components that introduce OS-level awareness of the asymmetric implementation of 3D V-cache on the 7900X3D and 7950X3D where only one of the two CCDs has the additional cache; these firmware-level options give users control on prioritizing one CCD over the other for workload. The firmware-level optimization is OS-agnostic, so pretty much any OS should benefit from 3D V-cache the way it was intended (where less parallelized workloads such as games are prioritized on the CCD with the 3D V-cache.