Intel “Meteor Lake-P” SoC with 6P+8E Compute Tile Pictured
We had earlier seen a 2P+8E version of the “Meteor Lake” Compute Tile, probably from the “Meteor Lake-U” package. The larger 6P+8E Compute tile features six “Redwood Cove” performance cores, and two “Crestmont” efficiency core clusters, each with four E-cores. Assuming the L3 cache slice per P-core or E-core cluster is 2.5 MB, there has to be 20 MB of L3 cache on the compute tile. Each P-core has 2 MB of dedicated L2 cache, while each of the two E-core clusters shares 4 MB of L2 cache among four E-cores.
Elsewhere in the SoC, we see the three other tiles—the iGPU Tile (dubbed GFX Tile), the SoC Tile, and the I/O tile. The GFX Tile packs the iGPU, which is possibly the more power-dense component than even a P-core, and so this tile possibly gets the most advanced silicon fabrication node on the package, which is very likely the TSMC N3 (3 nm). The SoC Tile packs high-performance uncore and I/O components, including the memory controllers, PCI-Express 5.0 root complex, Management Engine, and more.
The I/O Tile is essentially an integrated PCH that handles platform I/O that isn’t as bandwidth heavy has the main PEG interface, or the main Gen 5 NVMe interface. This tile could be built on the least advanced fabrication process. All four tiles are placed on a silicon interposer through 3D Foveros technology. The interposer is a silicon die that facilitates high-density microscopic wiring between dies in a multi-chip module; and appears like a single contiguous die to the fiberglass substrate.