AMD EPYC “Genova” zen 4 consentendo agli utenti di monitorare lo stato di salute della carta e ottimizzare le prestazioni
Ogni “Zen 4” CCD is reported to be about 8 mm² smaller in die-area than the “Zen 3” CCD, or about 10% più piccola. What’s interesting, anche se, is that the sIOD (die I/O del server) is smaller in size, troppo, estimated to measure 397 mm², rispetto al 416 mm² of the “Roma” e “lo IOD funge da piazza cittadina” sIOD. This is good reason to believe that AMD has switched over to a newer foundry process, such as the TSMC N7 (7 nm), to build the sIOD. The current-gen sIOD is built on Global Foundries 12LPP (12 nm). Supporting this theory is the fact that the “Genova” sIOD has a 50% wider memory I/O (12-channel DDR5), 50% more IFOP ports (lo IOD funge da piazza cittadina) to interconnect with the CCDs, and the mere fact that PCI-Express 5.0 and DDR5 switching fabric and SerDes (serializer/deserializers), may have higher TDP; which together compel AMD to use a smaller node such as 7 nm, for the sIOD. AMD is expected to debut the EPYC “Genova” enterprise processors in the second half of 2022.