MachineWare Launches High-Speed RISC-V Simulator

Controller Master


Headquartered in Aachen and emerging from stealth mode in May, MachineWare is set to revolutionize semiconductor design with its high-speed functional RISC-V simulator, SIM-V. SIM-V, the company’s flagship product, combines unprecedented simulation performance with exceptional customizability for applications ranging from the tiniest embedded devices to warehouse-scale supercomputers. SIM-V enables software developers to test full software stacks – including firmware, operating system kernel and complex user-space applications, such as (Java-) virtual machines or rich graphical environments – in real time.

Today’s hardware-software systems are becoming increasingly complex, with even tiny edge systems executing millions of lines of code. SIM-V gives software developers the ability to interactively debug even the most complex designs without the need for physical hardware, even before first prototypes are available. Integrating SIM-V into continuous integration systems minimizes test execution times, saves compute resources and allows developers to continue their work sooner.

Lukas Jünger – MachineWare managing director and co-founderOur mission is to equip RISC-V software developers with the tools they need to deliver safe and secure software stacks on schedule and glitch free

MachineWare offers tailored versions of SIM-V for different use cases:

  • SIM-V Compute targets the design and verification of high-performance RISC-V systems, including hardware models of GPUs and high-speed PCIes interconnects.
  • SIM-V Edge, on the other end of the spectrum, is optimized for designing compact 32-bit edge computing systems, offering a broad range of I/O from the microcontroller design space.

Both simulators are built on MachineWare’s open-source SystemC modelling library, VCML, which enables easy integration into existing verification setups and SystemC platform models, while providing tracing, analysis and scripting features.

SIM-V is also based on MachineWare’s fast and flexible instruction set simulation framework FTL. This enables easy customization of the simulator to add custom tailored RISC-V instruction set extensions or even design fully custom instruction set simulators for almost any microprocessor architecture.

MachineWare is a spinoff of RWTH Aachen’s Institute for Communication Technologies and Embedded Systems. The university has nurtured a culture of innovation, with 101 spinoffs in 2021 alone.