Micron Ships World’s Most Advanced DRAM Technology With 1-Beta Node
The world’s most advanced DRAM process node, 1? represents an advancement of the company’s market leadership cemented with the volume shipment of 1? (1-alpha) in 2021. The node delivers around a 15% power efficiency improvement and more than a 35% bit density improvement with a 16Gb per die capacity. “The launch of our 1-beta DRAM signals yet another leap forward for memory innovation, brought to life by our proprietary multi-patterning lithography in combination with leading-edge process technology and advanced materials capabilities,” said Scott DeBoer, executive vice president of technology and products at Micron. “In delivering the world’s most advanced DRAM technology with more bits per memory wafer than ever before, this node lays the foundation to usher in a new generation of data-rich, intelligent and energy-efficient technologies from the edge to the cloud.”
This milestone also follows quickly on the heels of Micron’s shipment of the world’s first 232-layer NAND in July, architected to drive unprecedented performance and areal density for storage. With these new firsts, Micron continues to set the pace for the market across memory and storage innovations—both made possible by the company’s deep roots in cutting-edge research and development (R&D) and manufacturing process technology.
With sampling of LPDDR5X, the mobile ecosystem will be the first to reap the benefits of 1? DRAM’s significant gains, which will unlock next-generation mobile innovation and advanced smartphone experiences—all while consuming less power. With 1?’s speed and density, high-bandwidth use cases will be responsive and smooth during downloads, launches and simultaneous use of data-hungry 5G and artificial intelligence (AI) applications. Additionally, 1?-based LPDDR5X will not only enhance smartphone camera launch, night mode and portrait mode with speed and clarity, but it will enable shake-free, high-resolution 8K video recording and intuitive in-phone video editing.
The low power per bit consumption of 1? process technology delivers the most power-efficient memory technology on the market for smartphones yet. This allows smartphone manufacturers to design devices with more efficient battery life—crucial as consumers look to prolong their batteries while using energy-draining, data-intensive apps.
The power savings are also enabled by the implementation of new JEDEC enhanced dynamic voltage and frequency scaling extensions core (eDVFSC) techniques on this 1?-based LPDDR5X. The addition of eDVFSC at a doubled frequency tier of up to 3,200 megabits per second provides improved power savings controls to enable more efficient use of power based off unique end user patterns.
Micron challenges laws of physics with sophisticated lithography and nanomanufacturing
Micron’s industry-first 1? node allows higher memory capacity in a smaller footprint—enabling lower cost per bit of data. DRAM scaling has largely been defined by this ability to deliver more and faster memory per square millimeter of semiconductor area, which requires shrinking the circuits to fit billions of memory cells on a chip roughly the size of a fingernail. With each process node, the semiconductor industry has been shrinking devices every year or two for decades; however, as chips have grown smaller, defining circuit patterns on wafers requires challenging the laws of physics.
While the industry has begun to shift to a new tool that uses extreme ultraviolet light to overcome these technical challenges, Micron has tapped into its proven leading-edge nanomanufacturing and lithography prowess to bypass this still emergent technology. Doing so involves applying the company’s proprietary, advanced multi-patterning techniques and immersion capabilities to pattern these miniscule features with the highest precision. The greater capacity delivered by this reduction will also enable devices with small form factors, such as smartphones and IoT devices, to fit more memory into compact footprints.
To achieve its competitive edge with 1? and 1?, Micron has also aggressively advanced its manufacturing excellence, engineering capabilities and pioneering R&D over the past several years. This accelerated innovation first enabled Micron’s unprecedented ramp of its 1? node one year ahead of its competition, which established Micron’s leadership in both DRAM and NAND for the first time in the company’s history. Over the years, Micron has further invested billions of dollars in transforming its fabs into leading-edge, highly automated, sustainable and AI-driven facilities. This includes investments in Micron’s plant in Hiroshima, Japan, which will be mass producing DRAM on 1?.
1-beta lays ubiquitous foundation for a more interconnected, sustainable world
As energy-sapping use cases like machine-to-machine communications, AI and machine learning take flight, power-efficient technologies are an increasingly critical need for businesses, especially those looking to meet strict sustainability targets and reduce operating expenses. Researchers have found that training a single AI model can emit five times the lifetime carbon emissions of an American car, including its manufacture. Further, information and communication technology is already predicted to use 20% of the world’s electricity by 2030.
Micron’s 1? DRAM node provides a versatile foundation to power advancements in a connected world that needs fast, ubiquitous, energy-efficient memory to fuel digitization, optimization and automation. The high-density, low-power memory fabricated on 1? enables more energy-efficient flow of data between data-hungry smart things, systems and applications, and more intelligence from edge to cloud. Over the next year, the company will begin to ramp the rest of its portfolio on 1? across embedded, data center, client, consumer, industrial and automotive segments, including graphics memory, high-bandwidth memory and more.